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  1 ipa045n10n3g rev.2.4,2016-01-22 final data sheet to-220-fp mosfet optimos tm 3power-transistor ,100v features ?n-channel,normallevel ?excellentgatechargex r ds(on) product(fom) ?verylowon-resistance r ds(on) ?175coperatingtemperature ?pb-freeleadplating;rohscompliant ?qualifiedaccordingtojedec 1) fortargetapplication ?idealforhigh-frequencyswitchingandsynchronousrectification ?halogen-freeaccordingtoiec61249-2-21 table1keyperformanceparameters parameter value unit v ds 100 v r ds(on),max 4.5 m w i d 64 a type/orderingcode package marking relatedlinks ipa045n10n3 g pg-to220-fp 045n10n - 1) j-std20 and jesd22 d r a i n p i n 2 g a t e p i n 1 s o u r c e p i n 3
2 optimos tm 3power-transistor ,100v ipa045n10n3g rev.2.4,2016-01-22 final data sheet tableofcontents description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 d r a i n p i n 2 g a t e p i n 1 s o u r c e p i n 3
3 optimos tm 3power-transistor ,100v ipa045n10n3g rev.2.4,2016-01-22 final data sheet 1maximumratings at t a =25c,unlessotherwisespecified table2maximumratings values min. typ. max. parameter symbol unit note/testcondition continuous drain current i d - - - - 64 45 a t c =25c 1) t c =100c pulsed drain current 1) i d,pulse - - 256 a t c =25c avalanche energy, single pulse e as - - 540 mj i d =64a, r gs =25 w gate source voltage v gs -20 - 20 v - power dissipation p tot - - 39 w t c =25c operating and storage temperature t j , t stg -55 - 175 c iec climatic category; din iec 68-1: 55/175/56 2thermalcharacteristics table3thermalcharacteristics values min. typ. max. parameter symbol unit note/testcondition thermal resistance, junction-case r thjc - - 3.8 k/w - thermal resistance, juntion-ambient, leaded r thja - - 80 k/w - 3electricalcharacteristics table4staticcharacteristics values min. typ. max. parameter symbol unit note/testcondition drain-source breakdown voltage v (br)dss 100 - - v v gs =0v, i d =1ma gate threshold voltage v gs(th) 2 2.7 3.5 v v ds = v gs , i d =150a zero gate voltage drain current i dss - - 0.1 10 1 100 a v ds =100v, v gs =0v, t j =25c v ds =100v, v gs =0v, t j =125c gate-source leakage current i gss - 1 100 na v gs =20v, v ds =0v drain-source on-state resistance r ds(on) - - 3.9 4.7 4.5 7.7 m w v gs =10v, i d =64a v gs =6v, i d =32a gate resistance r g - 1.4 - w - transconductance g fs 60 119 - s | v ds |>2| i d | r ds(on)max , i d =64a 1) see diagram 3 d r a i n p i n 2 g a t e p i n 1 s o u r c e p i n 3
4 optimos tm 3power-transistor ,100v ipa045n10n3g rev.2.4,2016-01-22 final data sheet table5dynamiccharacteristics values min. typ. max. parameter symbol unit note/testcondition input capacitance c iss - 6320 8410 pf v gs =0v, v ds =50v, f =1mhz output capacitance c oss - 1100 1460 pf v gs =0v, v ds =50v, f =1mhz reverse transfer capacitance c rss - 41 - pf v gs =0v, v ds =50v, f =1mhz turn-on delay time t d(on) - 25 - ns v dd =50v, v gs =10v, i d =64a, r g,ext =1.6 w rise time t r - 47 - ns v dd =50v, v gs =10v, i d =64a, r g,ext =1.6 w turn-off delay time t d(off) - 50 - ns v dd =50v, v gs =10v, i d =64a, r g,ext =1.6 w fall time t f - 15 - ns v dd =50v, v gs =10v, i d =64a, r g,ext =1.6 w table6gatechargecharacteristics 1)  values min. typ. max. parameter symbol unit note/testcondition gate to source charge q gs - 28 - nc v dd =50v, i d =64a, v gs =0to10v gate to drain charge q gd - 16 - nc v dd =50v, i d =64a, v gs =0to10v switching charge q sw - 25 - nc v dd =50v, i d =64a, v gs =0to10v gate charge total q g - 88 117 nc v dd =50v, i d =64a, v gs =0to10v gate plateau voltage v plateau - 4.4 - v v dd =50v, i d =64a, v gs =0to10v output charge q oss - 117 155 nc v dd =50v, v gs =0v table7reversediode values min. typ. max. parameter symbol unit note/testcondition diode continous forward current i s - - 64 a t c =25c diode pulse current i s,pulse - - 256 a t c =25c diode forward voltage v sd - 0.9 1 v v gs =0v, i f =64a, t j =25c reverse recovery time t rr - 69 - ns v r =50v, i f = 64 a,d i f /d t =100a/s reverse recovery charge q rr - 140 - nc v r =50v, i f = 64 a,d i f /d t =100a/s 1) see 2 gate charge waveforms 2 for parameter definition d r a i n p i n 2 g a t e p i n 1 s o u r c e p i n 3
5 optimos tm 3power-transistor ,100v ipa045n10n3g rev.2.4,2016-01-22 final data sheet 4electricalcharacteristicsdiagrams diagram1:powerdissipation t c [c] p tot [w] 0 50 100 150 200 0 10 20 30 40 50 p tot =f( t c ) diagram2:draincurrent t c [c] i d [a] 0 50 100 150 200 0 10 20 30 40 50 60 70 i d =f( t c ); v gs 3 10v diagram3:safeoperatingarea v ds [v] i d [a] 10 -1 10 0 10 1 10 2 10 3 10 -1 10 0 10 1 10 2 10 3 1 s 10 s 100 s 1 ms 10 ms dc i d =f( v ds ); t c =25c; d =0;parameter: t p diagram4:max.transientthermalimpedance t p [s] z thjc [k/w] 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 -2 10 -1 10 0 10 1 0.5 0.2 0.1 0.05 0.02 0.01 single pulse z thjc =f( t p );parameter: d = t p / t d r a i n p i n 2 g a t e p i n 1 s o u r c e p i n 3
6 optimos tm 3power-transistor ,100v ipa045n10n3g rev.2.4,2016-01-22 final data sheet diagram5:typ.outputcharacteristics v ds [v] i d [a] 0 1 2 3 4 5 0 50 100 150 200 250 6 v 7.5 v 10 v 5.5 v 5 v 4.5 v i d =f( v ds ); t j =25c;parameter: v gs diagram6:typ.drain-sourceonresistance i d [a] r ds(on)  [m w ] 0 20 40 60 80 100 0 2 4 6 8 10 4.5 v 5 v 6 v 7.5 v 10 v r ds(on) =f( i d ); t j =25c;parameter: v gs diagram7:typ.transfercharacteristics v gs [v] i d [a] 0 2 4 6 8 0 50 100 150 200 175 c 25 c i d =f( v gs );| v ds |>2| i d | r ds(on)max ;parameter: t j diagram8:typ.forwardtransconductance i d [a] g fs [s] 0 20 40 60 80 100 0 40 80 120 160 g fs =f( i d ); t j =25c d r a i n p i n 2 g a t e p i n 1 s o u r c e p i n 3
7 optimos tm 3power-transistor ,100v ipa045n10n3g rev.2.4,2016-01-22 final data sheet diagram9:drain-sourceon-stateresistance t j [c] r ds(on)  [m w ] -60 -20 20 60 100 140 180 0 2 4 6 8 10 98 % typ r ds(on) =f( t j ); i d =64a; v gs =10v diagram10:typ.gatethresholdvoltage t j [c] v gs(th) [v] -60 -20 20 60 100 140 180 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 1500 a 150 a v gs(th) =f( t j ); v gs = v ds ;parameter: i d diagram11:typ.capacitances v ds [v] c [pf] 0 20 40 60 80 10 1 10 2 10 3 10 4 ciss coss crss c =f( v ds ); v gs =0v; f =1mhz diagram12:forwardcharacteristicsofreversediode v sd [v] i f [a] 0.0 0.5 1.0 1.5 2.0 10 0 10 1 10 2 10 3 25 c 175 c 25 c, 98% 175 c, 98% i f =f( v sd );parameter: t j d r a i n p i n 2 g a t e p i n 1 s o u r c e p i n 3
8 optimos tm 3power-transistor ,100v ipa045n10n3g rev.2.4,2016-01-22 final data sheet diagram13:avalanchecharacteristics t av [s] i as [a] 10 0 10 1 10 2 10 3 10 0 10 1 10 2 25 c 100 c 150 c i as =f( t av ); r gs =25 w ;parameter: t j(start) diagram14:typ.gatecharge q gate [nc] v gs [v] 0 20 40 60 80 100 0 2 4 6 8 10 80 v 50 v 20 v v gs =f( q gate ); i d =64apulsed;parameter: v dd diagram15:drain-sourcebreakdownvoltage t j [c] v br(dss) [v] -60 -20 20 60 100 140 180 90 95 100 105 110 v br(dss) =f( t j ); i d =1ma d r a i n p i n 2 g a t e p i n 1 s o u r c e p i n 3 gate charge waveforms
9 optimos tm 3power-transistor ,100v ipa045n10n3g rev.2.4,2016-01-22 final data sheet 5packageoutlines figure1outlinepg-to220-fp,dimensionsinmm/inches d r a i n p i n 2 g a t e p i n 1 s o u r c e p i n 3 gate charge waveforms
10 optimos tm 3power-transistor ,100v ipa045n10n3g rev.2.4,2016-01-22 final data sheet revisionhistory ipa045n10n3 g revision:2016-01-22,rev.2.4 previous revision revision date subjects (major changes since last revision) 2.4 2016-01-22 insert rthja trademarksofinfineontechnologiesag aurix?,c166?,canpak?,cipos?,coolgan?,coolmos?,coolset?,coolsic?,corecontrol?,crossave?,dave?,di-pol?,drblade?, easypim?,econobridge?,econodual?,econopack?,econopim?,eicedriver?,eupec?,fcos?,hitfet?,hybridpack?,infineon?, isoface?,isopack?,i-wafer?,mipaq?,modstack?,my-d?,novalithic?,omnitune?,optiga?,optimos?,origa?,powercode?, primarion?,primepack?,primestack?,profet?,pro-sil?,rasic?,real3?,reversave?,satric?,sieget?,sipmos?,smartlewis?, solidflash?,spoc?,tempfet?,thinq?,trenchstop?,tricore?. trademarksupdatedaugust2015 othertrademarks allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. welistentoyourcomments anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.pleasesendyourproposal(includingareferencetothisdocument)to: erratum@infineon.com publishedby infineontechnologiesag 81726mnchen,germany ?2015infineontechnologiesag allrightsreserved. legaldisclaimer theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics.with respecttoanyexamplesorhintsgivenherein,anytypicalvaluesstatedhereinand/oranyinformationregardingtheapplication ofthedevice,infineontechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithout limitation,warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty. information forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestinfineon technologiesoffice( www.infineon.com ). warnings duetotechnicalrequirements,componentsmaycontaindangeroussubstances.forinformationonthetypesinquestion, pleasecontactthenearestinfineontechnologiesoffice. theinfineontechnologiescomponentdescribedinthisdatasheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofinfineontechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. d r a i n p i n 2 g a t e p i n 1 s o u r c e p i n 3 gate charge waveforms


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